Various processing steps are used to fabricate integrated circuits on a semiconductor wafer. These steps include deposition of a conducting layer on the silicon wafer substrate; formation of a photoresist or other mask such as titanium oxide or silicon oxide, in the form of the desired metal interconnection pattern, using standard lithographic or photolithographic techniques; subjecting the wafer substrate to a dry etching process to remove the conducting layer from the areas not covered by the mask, thereby etching the conducting layer in the form of the masked pattern on the substrate; removing or stripping the mask layer from the substrate typically using reactive plasma and chlorine gas, thereby exposing the top surface of the conductive interconnect layer; and cooling and drying the wafer substrate by applying water and nitrogen gas to the wafer substrate.
In a common IC fabrication technique known as a dual damascene technique, lower and upper dielectric layers are sequentially deposited on a substrate. A via opening is patterned and etched in the lower dielectric layer, and a trench opening is patterned and etched in the upper dielectric layer. At each step, a patterned photoresist layer is used to etch the trench and via openings in the corresponding dielectric layer. A conductive copper line is then formed in the trench and via openings, typically using electrochemical plating (ECP) techniques, to form the horizontal and vertical IC circuit interconnects on the substrate.
Photoresist materials are coated onto the surface of a wafer, or onto a dielectric or conductive layer on a wafer, by dispensing a photoresist fluid typically on the center of the wafer as the wafer rotates at high speeds within a stationary bowl or coater cup. The coater cup catches excess fluids and particles ejected from the rotating wafer during application of the photoresist. The photoresist fluid dispensed onto the center of the wafer is spread outwardly toward the edges of the wafer by surface tension generated by the centrifugal force of the rotating wafer. This facilitates uniform application of the liquid photoresist on the entire surface of the wafer.
During the photolithography step of semiconductor production, light energy is applied through a reticle or mask onto the photoresist material previously deposited on the wafer to define circuit patterns which will be etched in a subsequent processing step to define the circuits on the wafer. A reticle is a transparent plate patterned with a circuit image to be formed in the photoresist coating on the wafer. A reticle contains the circuit pattern image for only a few of the die on a wafer, such as four die, for example, and thus, must be stepped and repeated across the entire surface of the wafer. In contrast, a photomask, or mask, includes the circuit pattern image for all of the die on a wafer and requires only one exposure to transfer the circuit pattern image for all of the dies to the wafer.
Spin coating of photoresist on wafers, as well as the other steps in the photolithography process, is carried out in an automated coater/developer track system using wafer handling equipment which transport the wafers between the various photolithography operation stations, such as vapor prime resist spin coat, develop, baking and chilling stations. Robotic handling of the wafers minimizes particle generation and wafer damage. Automated wafer tracks enable various processing operations to be carried out simultaneously. Two types of automated track systems widely used in the industry are the TEL (Tokyo Electron Limited) track and the SVG (Silicon Valley Group) track.
A typical method of forming a circuit pattern on a wafer includes introducing the wafer into the automated track system and then spin-coating a photoresist layer onto the wafer. The photoresist is next cured by conducting a soft bake process. After it is cooled, the wafer is placed in an exposure apparatus, such as a stepper, which aligns the wafer with an array of die patterns etched on the typically chrome-coated quartz reticle. When properly aligned and focused, the stepper exposes a small area of the wafer, then shifts or “steps” to the next field and repeats the process until the entire wafer surface has been exposed to the die patterns on the reticle. The photoresist is exposed to light through the reticle in the circuit image pattern. Exposure of the photoresist to this image pattern cross-links and hardens the resist in the circuit pattern. After the aligning and exposing step, the wafer is exposed to post-exposure baking and then is developed and hard-baked to develop the photoresist pattern.
The circuit pattern defined by the developed and hardened photoresist is next transferred to an underlying metal layer using an etching process, in which metal in the metal layer not covered by the cross-linked photoresist is etched away from the wafer with the metal under the cross-linked photoresist that defines the device feature protected from the etchant. Alternatively, the etched material may be a dielectric layer in which via openings and trench openings are etched according to the circuit pattern, such as in a dual damascene technique. The via and trench openings are then filled with a conductive metal such as copper to define the metal circuit lines. As a result, a well-defined pattern of metallic microelectronic circuits, which closely approximates the cross-linked photoresist circuit pattern, is formed on the wafer.
One type of lithography which is used in the semiconductor fabrication industry is immersion lithography, in which an exposure apparatus includes a mask and lens which are provided over an optical transfer chamber. A water-containing exposure liquid is distributed through the optical transfer chamber. In operation, the optical transfer chamber is placed over an exposure field on a photoresist-coated wafer. As the exposure liquid is distributed through the optical transfer chamber, light is transmitted through the mask, lens and exposure liquid in the optical transfer chamber, respectively, and onto the photoresist of the exposure field. The circuit pattern image in the mask is therefore transferred by the light transmitted through the exposure liquid to the photoresist. The exposure liquid in the optical transfer chamber enhances the resolution of the transmitted circuit pattern image on the photoresist.
Prior to distribution of the exposure liquid through the optical transfer chamber, the aqueous liquid is typically de-gassed to remove most of the microbubbles from the liquid. However, some of the microbubbles remain in the liquid during its distribution through the optical transfer chamber. These remaining microbubbles have a tendency to adhere to the typically hydrophobic surface of the photoresist, thereby distorting the circuit pattern image projected onto the photoresist. Accordingly, an apparatus and method is needed to substantially obliterate microbubbles in an exposure liquid during immersion lithography in order to prevent distortion of the circuit pattern image projected onto the photoresist in an exposure field.
An object of the present invention is to provide a novel apparatus for substantially eliminating microbubbles in an exposure liquid before or during immersion lithography.
Another object of the present invention is to provide a novel megasonic exposure apparatus which is capable of substantially eliminating microbubbles in an exposure liquid before or during immersion lithography.
Still another object of the present invention is to provide a novel megasonic exposure apparatus which enhances the quality of a circuit pattern image projected onto a photoresist during immersion lithography.
Yet another object of the present invention is to provide a novel megasonic exposure apparatus in which sonic waves are used to substantially obliterate microbubbles in an exposure liquid before or during immersion lithography.
A still further object of the present invention is to provide a novel megasonic immersion lithography exposure method in which sonic waves are used to substantially obliterate microbubbles in an exposure liquid before or during immersion lithography.
A still further object of the present invention is to provide a novel megasonic immersion lithography exposure method in which sonic waves are used to substantially obliterate microbubbles and particles on exposure lens before or during immersion lithography.